In a significant stride toward advancing artificial intelligence (AI) capabilities, IBM Research Europe has introduced a cutting-edge computing chip optimized for complex deep neural network computations. The new 64-core mixed-signal in-memory computing chip showcases a remarkable fusion of analog and digital processing, delivering accelerated computation times and reduced energy consumption.
Revolutionizing AI computing with analog in-memory computing
For decades, the pursuit of faster, more energy-efficient computing has been a central theme for electronics engineers. Given their substantial computational demands, this quest has become even more pressing with the advent of AI and deep learning algorithms. Analog in-memory computing (AIMC) is a promising approach, seamlessly integrating computation and data storage on a single chip.
IBM Research Europe’s breakthrough lies in their revolutionary 64-core mixed-signal in-memory computing chip, leveraging phase-change memory (PCM) devices with digital computing processors. This melding of analog and digital components creates an architecture capable of tackling the intricate computations essential for deep neural networks.
The heart of the chip consists of 64 analog PCM-based cores, each housing a 256-by-256 crossbar array of synaptic unit cells. Compact time-based analog-to-digital converters are embedded within each core to facilitate smooth transitions between analog and digital processing. Furthermore, lightweight digital processing units are strategically integrated into every core, efficiently handling tasks such as rectified linear unit (reLU) neuronal activation functions and long-short-term memory (LSTM) network operations.
Digital communication network a key to unprecedented performance
One of the chip’s distinctive features is its digital communication network, interconnecting the memory cores and the global processing unit. This ingenious setup empowers the chip to execute computations required for individual neural network layers on-chip, leading to significantly reduced computation times and energy consumption. As a result, the chip’s performance benchmarks outshine its contemporaries.
In a comprehensive evaluation, IBM Research Europe’s team subjected the chip to rigorous tests using deep learning algorithms. The outcome was remarkable, with deep neural networks achieving an impressive accuracy of 92.81% when tested on the CIFAR-10 image dataset. Notably, this level of accuracy stands among the highest reported for chips employing similar technology, underlining the efficacy of IBM’s approach.
Stepping stones to future progress
IBM’s recent achievement marks a pivotal step towards enabling AIMC chips to seamlessly support the intricate requirements of deep learning algorithms. This accomplishment could lay the foundation for further enhancements in chip architecture, potentially unlocking even more substantial performance gains.
Building upon its success, IBM Research Europe envisions refining its chip design. Drawing lessons from the current chip and a previous 34-tile chip, the team aims to create an end-to-end analog AI inference accelerator architecture. This ambitious endeavor involves integrating numerous analog in-memory computing tiles with specialized digital compute cores. All are interconnected through a highly efficient massively parallel 2D mesh network. Alongside sophisticated hardware-aware training techniques developed in recent years, these accelerators aspire to deliver exceptional neural network accuracies across diverse models in the foreseeable future.
IBM Research Europe’s groundbreaking 64-core mixed-signal in-memory computing chip represents a remarkable stride in AI computing. By combining analog and digital processing, the chip showcases enhanced computation speeds and energy efficiency, key facets in AI and deep learning. With a promising vision for the future, the path is set for AI acceleration through innovative chip architectures.
